Electronic design tools and techniques for the implementation of a stereoscopic camera based on an FPGA (Field Programmable Gate Array) are presented. The stages of an IPP (Image Processing Pipeline) are presented together ...

An implementation of a real-time 3D video acquisition system on a single FPGA is presented. Our approach is based on the use of stereo image sensors and can display real-time 3D video when combined with shutter glasses. ...

The implementation of a dual image processing pipeline camera on a state-of-art FPGA system is described. This camera can simultaneously acquire dual images of a scene and process, analyze and merge both images to enable ...