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dc.contributor.authorMcCurry, Peter
dc.contributor.authorKilmartin, Liam
dc.contributor.authorMorgan, Fearghal
dc.date.accessioned2015-06-08T15:34:57Z
dc.date.available2015-06-08T15:34:57Z
dc.date.issued2000-06
dc.identifier.urihttp://hdl.handle.net/10379/5010
dc.description.abstractThis paper describes an FPGA and distributed RAM architecture for an image pixel processor implementing primary elements of an object detection system. A comparison of the system performance with existing DSP processor-based alternatives is detailed. An implementation using the RC1000-PP FPGA-based development platform and Handel-C hardware programming language is outlined. A system architecture is proposed for an image pixel processor for elements of a machine vision based object detection systems.en_US
dc.language.isoenen_US
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Ireland
dc.rights.urihttps://creativecommons.org/licenses/by-nc-nd/3.0/ie/
dc.subjectObject Detectionen_US
dc.subjectVirtexen_US
dc.subjectRC1000-PPen_US
dc.subjectHandel-Cen_US
dc.subjectimage processingen_US
dc.subjectFPGAen_US
dc.titleXilinx FPGA implementation of a pixel processor for object detection applicationsen_US
dc.typeConference Paperen_US
dc.description.peer-reviewedpeer-revieweden_US
dc.contributor.funderXilinx Ireland, NUI Galway Fellowshipen_US
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Attribution-NonCommercial-NoDerivs 3.0 Ireland
Except where otherwise noted, this item's license is described as Attribution-NonCommercial-NoDerivs 3.0 Ireland