Xilinx FPGA implementation of a pixel processor for object detection applications

dc.contributor.author	McCurry, Peter
dc.contributor.author	Kilmartin, Liam
dc.contributor.author	Morgan, Fearghal
dc.date.accessioned	2015-06-08T15:34:57Z
dc.date.available	2015-06-08T15:34:57Z
dc.date.issued	2000-06
dc.identifier.uri	http://hdl.handle.net/10379/5010
dc.description.abstract	This paper describes an FPGA and distributed RAM architecture for an image pixel processor implementing primary elements of an object detection system. A comparison of the system performance with existing DSP processor-based alternatives is detailed. An implementation using the RC1000-PP FPGA-based development platform and Handel-C hardware programming language is outlined. A system architecture is proposed for an image pixel processor for elements of a machine vision based object detection systems.	en_US
dc.language.iso	en	en_US
dc.rights	Attribution-NonCommercial-NoDerivs 3.0 Ireland
dc.rights.uri	https://creativecommons.org/licenses/by-nc-nd/3.0/ie/
dc.subject	Object Detection	en_US
dc.subject	Virtex	en_US
dc.subject	RC1000-PP	en_US
dc.subject	Handel-C	en_US
dc.subject	image processing	en_US
dc.subject	FPGA	en_US
dc.title	Xilinx FPGA implementation of a pixel processor for object detection applications	en_US
dc.type	Conference Paper	en_US
dc.description.peer-reviewed	peer-reviewed	en_US
dc.contributor.funder	Xilinx Ireland, NUI Galway Fellowship	en_US
nui.item.downloads	163

Except where otherwise noted, this item's license is described as Attribution-NonCommercial-NoDerivs 3.0 Ireland