Xilinx FPGA implementation of a pixel processor for object detection applications
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This paper describes an FPGA and distributed RAM architecture for an image pixel processor implementing primary elements of an object detection system. A comparison of the system performance with existing DSP processor-based alternatives is detailed. An implementation using the RC1000-PP FPGA-based development platform and Handel-C hardware programming language is outlined. A system architecture is proposed for an image pixel processor for elements of a machine vision based object detection systems.