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An FPGA-based stereoscopic camera - electronic design tools and techniques
(IEEE, 2010-08-05)
Electronic design tools and techniques for the implementation of a stereoscopic camera based on an FPGA (Field Programmable Gate Array) are presented. The stages of an IPP (Image Processing Pipeline) are presented together ...
Hardware implementation of a real-time 3D video acquisition system
(IEEE, 2010-07-15)
An implementation of a real-time 3D video acquisition system on a single FPGA is presented. Our approach is based on the use of stereo image sensors and can display real-time 3D video when combined with shutter glasses. ...
A dual image processing pipeline camera with CE applications
(2011)
The implementation of a dual image processing
pipeline camera on a state-of-art FPGA system is described. This
camera can simultaneously acquire dual images of a scene and
process, analyze and merge both images to enable ...